Cypress Perform nvSRAM - Manual (Page 11)

PRELIMINARY
CY14B102L, CY14B102N
Document #: 001-45754 Rev. *B Page 11 of 24
Figure 9. SRAM Write Cycle #2: CE Controlled [3, 18, 19, 20]
Figure 10. SRAM Write Cycle #3: BHE and BLE Controlled [3, 18, 19, 20]
'DWD2XWSXW
'DWD,QSXW ,QSXW'DWD9DOLG
+LJK,PSHGDQFH
$GGUHVV9DOLG $GGUHVV
W
:&
W
6'
W
+'
%+(%/(
:(
&(
W
6&(
W
6$
W
%:
W
+$
W
$:
W
3:(
'DWD2XWSXW
'DWD,QSXW ,QSXW'DWD9DOLG
+LJK,PSHGDQFH
$GGUHVV9DOLG $GGUHVV
W
:&
W
6'
W
+'
%+(%/(
:(
&(
W
6&(
W
6$
W
%:
W
+$
W
$:
W
3:(
[+] Feedback