Cypress CY7C1302DV25 - Manual (Page 16)

CY7C1302DV25
Document #: 38-05625 Rev. *A Page 16 of 18
Switching Waveforms [25, 26, 27]
Notes:
25. Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0 i.e., A0+1.
26. Outputs are disabled (High-Z) one clock cycle after a NOP.
27. In this example, if address A2=A1 then data Q20=D10 and Q21=D11. Write data is forwarded immediately as read results.This note applies to the whole diagram.
READ READ WRITE WRITE WRITE NOP READ WRITE NOP
K
1 2 3 4 5 8 10 6 7
K
RPS
WPS
A
Q
D
C
C
A1 A0
D10
tKH tKHKH
tKHCH tCO
tKL tCYC
tHC
t SA t
HA
t
HD
tKHCH
DON’T CARE UNDEFINED
tCLZ
tCHZ
tSC
tKH tKL
A2 A3 A4 A5 A6
t
HA
D11 D30 D31 D50 D51 D60 D61
t
SD
t
HD
Q00 Q21 Q01 Q20 Q40 Q41
tCO
tDOH tDOH
tKHKH tCYC
9
t SA
t SD
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