Digilent 410-258P-KIT - Manual (Page 2)

Anvyl Reference Manual
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Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners.
Features include:
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Spartan6-LX45 FPGA ： XC6SLX45-CSG484-3
•
128MB DDR2 SDRAM
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2MB SRAM
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16MB QSPI FLASH for configuration and data storage
•
10/100 Ethernet PHY
• HDMI Video Output
• 12-bit VGA port
•
4.3” wide-format vivid color LED backlit LCD screen
•
128x32 pixel 0.9’’ WiseChip/Univision UG-23832HSWEG04 OLED graphic display panel
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three two-digit Seven Segment LED displays
•
I 2 S Audio codec with line-in, line-out, mic, and headphone
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100MHz Crystal Oscillator
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on-board USB2 ports for programming and USB-HID devices (for mouse/keyboard)
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Digilent USB-JTAG circuitry with USB-UART functionality
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keypad with 16 labeled keys (0-F)
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GPIO: 14 LEDs (10 red, 2 yellow, 2 green), 8 slide switches, 8 DIP switches in 2 groups and 4
push buttons
•
breadboard with 10 Digital I/O’s
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32 I/O’s routed to 40-pin expansion connector (I/O’s are shared with Pmod connectors)
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seven 12-pin Pmod connectors with 56 I/O’s total
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ships with a 20W power supply and USB cable
FPGA Configuration
After being turned on, the FPGA on the Anvyl board must be configured (or programmed) before it
can perform any functions. The FPGA can be configured in three ways: a PC can use the Digilent
USB-JTAG circuitry (port J12, labeled “PROG”) to program the FPGA any time power is on, a
configuration file stored in the onboard SPI Flash ROM can be automatically transferred to the FPGA
at power-on, or a programming file can be transferred from a USB memory stick to the USB HID port
labeled “Host” (J14).
An on-board mode jumper (JP2) selects between JTAG/USB and ROM programming modes. If JP2 is
not loaded, the FPGA will automatically configure itself from the ROM. If JP2 is loaded, the FPGA will
remain idle after power-on until configured from the JTAG or Serial programming port (USB memory
stick).
Both Digilent and Xilinx freely distribute software that can be used to program the FPGA and the SPI
ROM. Programming files are stored within the FPGA in SRAM-based memory cells. This data defines
the FPGA’s logic functions and circuit connections, and it remains valid until it is erased by removing
power, asserting the PROG_B input, or until it is overwritten by a new configuration file.
FPGA configuration files transferred via the JTAG port and from a USB stick use the .bit file type, and
SPI programming files use the .mcs file type. Xilinx’s ISE WebPack and EDK software can create .bit