Cirrus Logic CS5480 - Manual (Page 30)

CS5480
30 DS980F3
6.1.3 Checksum
To improve the communication reliability on the serial
interface, the CS5480 provides a checksum mechanism
on transmitted and received signals. Checksum is
disabled by default but can be enabled by setting the
appropriate bit in the SerialCtrl register. When enabled,
both host and CS5480 are expected to send one
additional checksum byte after the normal command
byte and the applicable 3-byte register data has been
transmitted.
The checksum is calculated by subtracting each
transmit byte from 0xFF. Any overflow is truncated and
the result wraps. The CS5480 executes the command
only if the checksum transmitted by the host matches
the checksum calculated locally. Otherwise, it sets a
status bit (RX_CSUM_ERR in the Status0 register),
ignores the command, and clears the serial interface in
preparation for the next transmission.
Figure 24. Byte Sequence for Checksum
6.1.4 Serial Time Out
In case a transaction from the host is not completed (for
example, a data byte is missing in a register write), a
time out circuit will reset the interface after 128ms. This
will require that each byte be sent from the host within
128ms of the previous byte.
SDI/RX Checksum Page Select Cmd.
SDO/TX
SDI/RX CHECKSUM
DATA DATA DATA CHECKSUM
Read Cmd.
SDI/RX DATA DATA DATA CHECKSUM Write Cmd.
SDI/RX Checksum Instruction
Page Select
Instruction
Read Command
Write Command