Cirrus Logic CS485xx - Manual (Page 67)

6-1 Copyright 2009 Cirrus Logic, Inc. DS734UM7
Introduction
CS485xx Hardware User’s Manual
Chapter 6
Digital Audio Output Interface
6.1 Introduction
The CS485xx Digital Audio Output port can provide up to 12 channels of PCM data (up to 32-bit resolution).
The Digital Audio Output port is implemented with a modified 3-wire Inter-IC Sound (I
2
S) interface along with
an oversampling master clock (MCLK). The I
2
S interface includes a frame clock at the current sampling
frequency (LRCLK), a bit clock for clocking the bits of the audio word (SCLK), and up to 6 audio data output
signals (DATA[5:0]). Each of the output data signals can be connected to the digital stereo input of an audio
digital-to-analog converter (DAC) for up to 12 channels of stereo PCM output.
The DAO port may slave to an externally generated SCLK and LRCLK or it may master these clocks if
MCLK is provided. The port supports data rates from 32 kHz to 192 kHz. One DAO pin can also be
configured to provide a 32-kHz to 192-kHz S/PDIF transmitter (XMTA) output.
Figure 6-1 , Figure 6-2 , Figure
6-3 illustrate the DAO block diagrams for the CS48560, CS48540 , and CS48520 products respectively.
6.2 Digital Audio Output Port Description
6.2.1 DAO Pin Description
Table 6-1 identifies the pins associated with the Digital Audio Output Port.
Table 6-1. Digital Audio Output (DAO) Pins
Pin Name Pin Description
LQFP-48
Pin #
Pin
Type
DAO_LRCLK Sample Rate Clock 21 I/O
DAO_SCLK Bit Clock 23 I/O
DAO1_DATA0 Digital Audio Output 20 Output
DAO1_DATA1
Digital Audio Output
Note: DAO1_DATA1 is not
available on CS48520
27 Output
DAO1_DATA2
Digital Audio Output
Note: DAO1_DATA2 is not
available on CS48520
26 Output
DAO1_DATA3/XMTA Digital Audio Output 29 Output
DAO2_DATA0 Digital Audio Output 31 Output
DAO2_DATA1
Digital Audio Output
Note: DAO2_DATA1 is not
available on CS48520 or
CS48540.
32 Output
DAO_MCLK Master Clock 25 I/O