Cirrus Logic CDB470xx User Manual
Page 3
DS886DB11
Copyright 2014 Cirrus Logic
iii
CDB47xxx User’s Manual
Contents
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-iii
Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-v
Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-vii
1.1 CDB47xxx Kit Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1
1.2 Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3
1.2.1 PC Requirements ...........................................................................................................1-3
1.2.2 Software Requirements ..................................................................................................1-3
1.2.3 Support Hardware Requirements ...................................................................................1-3
1.2.4 Cabling Requirements ....................................................................................................1-3
1.3.1.1 Analog Line-level Inputs -- Single-Ended (CDB47xxxS only)
(AIN1A - AIN5B, AIN6B) .............................................................................................1-5
1.3.1.2 Analog Line-level Inputs -- Differential (CDB47xxxD only)
(AIN1A - AIN5B, AIN6B) .............................................................................................1-5
1.3.1.3 Optical Digital Input (J21) ..............................................................................1-6
1.3.1.4 Coaxial Digital Input (J4)................................................................................1-6
1.3.1.5 Microphone Input (J9)....................................................................................1-6
1.3.1.6 DSP Digital Audio Input (DAI) (J18 or DAI) ...................................................1-6
1.3.2.1 Main Analog Line-level Outputs (CDB47xxxS and CDB47xxxD)
(J5-J8, J10-J13, or AOUT_1 - AOUT_8) ....................................................................1-6
1.3.2.2 Optical Digital Output (J1)..............................................................................1-6
1.3.2.3 Coaxial Digital Output (J35) ...........................................................................1-7
1.3.2.4 DSP Digital Audio Output (DAO) (J24 or DAO) .............................................1-7
1.3.3 DC Power Input (J2) .......................................................................................................1-7
1.3.4 External Control Header (JP1) .......................................................................................1-7
1.3.5 USB Connector (J25) .....................................................................................................1-7
1.3.6 On-Board Voltage Selection Headers (P1-P3) ...............................................................1-7
1.3.7 Digital Audio Input Source Multiplexer (U1)....................................................................1-8
1.3.8 CS470xx Audio System-On-a-Chip (ASOC) ..................................................................1-8
1.3.9 C8051 MCU....................................................................................................................1-9
1.3.10 MCU Input: Push Buttons(S1-S4) and Rotary Encoder (S5)........................................1-9
1.3.11 MCU Output (LCD) (LCD1) ..........................................................................................1-9
1.3.12 Memory (U17, U16 and U14)) ......................................................................................1-9
1.5.1 Clock and Data Flow for ADC Input..............................................................................1-14
1.5.2 Clock and Data Flow for S/PDIF Input..........................................................................1-15
1.5.3 Clock and Data Flow for DAI Input with Fixed Output Fs .............................................1-16