Rainbow Electronics DS2432 - Manual (Page 8)

PRELIMINARY DS2432
8 of 30
Memory and SHA Functions Flow Chart Figure 7
0Fh
Write Scratch-
pad ?
Master
TX Reset ?
Master TX Data Byte
To Scratchpad
Bus Master TX
TA1 (T7:T0), TA2 (T15:T8)
Y N
Y
N
N
Address
< 90h ?
Y
Bus Master
RX “1”s
Master
TX Reset ?
Y
N
DS2432 sets Scratchpad
Byte Counter = 0,
Clears PF, AA,
Sets T2:T0 = 0, 0, 0,
Sets E2:E0 = 1, 1, 1
Byte Counter
= 7 ?
DS2432 TX CRC16
of Command, Address,
Data Bytes as they were
sent by the bus master
DS2432
Increments
Byte Counter
Master
TX Reset ?
Y
N
Bus Master
RX “1”s
Partial
Byte ?
PF = 1
Y
N
N
Y
To Figure 7
2
nd
Part
From Figure 7
2
nd
Part
Bus Master TX Memory
Function Command
To ROM Functions
Flow Chart (Figure 9)
From ROM Functions
Flow Chart (Figure 9)