Rainbow Electronics DS2432 - Manual (Page 3)

PRELIMINARY DS2432
3 of 30
64-BIT LASERED ROM
Each DS2432 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family
code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. (See
Figure 3). The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and
XOR gates as shown in Figure 4. The polynomial is X
8
+ X
5
+ X
4
+ 1. Additional information about the
Dallas 1-Wire Cyclic Redundancy Check is available in the Book of DS19xx iButton Standards from
Dallas Semiconductor. The shift register bits are initialized to zero. Then starting with the least significant
bit of the family code, one bit at a time is shifted in. After the 8
th
bit of the family code has been entered,
then the serial number is entered. After the 48
th
bit of the serial number has been entered, the shift register
contains the CRC value. Shifting in the eight bits of CRC should return the shift register to all zeros.
HIERARCHCAL STRUCTURE FOR 1-WIRE PROTOCOL Figure 2
1-Wire net
Other
Devices
BUS
Master
DS2432
Available
Commands: Command
Level: Data Field
Affected:
1-Wire ROM Function
Commands (see Figure 9)
DS2432-specific
Memory Function
Commands (see Figure 7)
Read ROM
Match ROM
Search ROM
Skip ROM
Resume
Overdrive Skip
Overdrive Match 64-bit Reg. #, RC-Flag
64-bit Reg. #, RC-Flag
64-bit Reg. #, RC-Flag
RC-Flag
RC-Flag
64-bit Reg. #, RC-Flag, OD-Flag
64-bit Reg. #, RC-Flag, OD-Flag
Write Scratchpad
Read Scratchpad
Load First Secret
Compute Next Secret
Copy Scratchpad
Read Authenti-
cated Page
Read Memory
64-bit Scratchpad, Flags
64-bit Scratchpad
Secret, Flags
Secret, Data Memory, Scratchpad
Data Memory or Register Page,
Secret, Flags, 64-Bit Reg. #,
Data Memory, Secret, 64-bit Reg. #,
3-Byte Challenge in Scratchpad
Data Memory, Register Page, Reg. #
64-BIT LASERED ROM Figure 3
MSB LSB
8-Bit CRC Code 48-Bit Serial Number 8-Bit Family Code (33h)
MSB LSB MSB LSB MSB LSB