Rainbow Electronics DS2432 - Manual (Page 12)

PRELIMINARY DS2432
12 of 30
Memory and SHA Functions Flow Chart (continued) Figure 7
55h
Copy Scratch-
pad ?
Y
N
Bus Master TX
TA1 (T7:T0),
TA2 (T15:T8),
E/S Byte
Auth. Code
Match ?
N
Y
Bus Master
RX “1”s
Master
TX Reset ?
Y
N
AA = 1
DS2432 Copies Scratchpad
Data to Memory
Master
TX Reset ?
Master
TX Reset ?
Y
N
DS2432 TX “1”
DS2432 TX “0”
N
Y
MAC Code
Match ?
Y
N
N
DS2432
TX “0”s
Master
TX Reset ?
Y
* 1-Wire idle high for power
SHA Engine Computes
Message Authentication
Code of Secret, 28 Bytes of
Page Data, Scratchpad
Data, and Device
Registration Number
Bus Master computes MAC
and sends it to DS2432
*
*
From Figure 7
4
th
Part
To Figure 7
4
th
Part
To Figure 7
6
th
Part
From Figure 7
6
th
Part
Bus Master
waits 10 ms
Write-
Protected ?
Y
N
Note: This command is
applicable to all R/W
memory addresses.