Rainbow Electronics DS1220Y - Manual (Page 2)

DS1220Y
091295 2/8
READ MODE
The DS1220Y executes a read cycle whenever WE
(Write Enable) is inactive (high) and CE (Chip Enable)
and OE (Output Enable) are active (low). The unique
address specified by the 11 address inputs (A
0
-A
10
)
defines which of the 2048 bytes of data is to be
accessed. Valid data will be available to the eight data
output drivers within t
ACC
(Access Time) after the last
address input signal is stable, providing that CE and OE
access times are also satisfied. If OE and CE access
times are not satisfied, then data access must be
measured from the later occurring signal (CE or OE)
and the limiting parameter is either t
CO
for CE or t
OE
for
OE rather than address access.
WRITE MODE
The DS1220Y executes a write cycle whenever the WE
and CE signals are active (low) after address inputs are
stable. The latter occurring falling edge of CE or WE will
determine the start of the write cycle. The write cycle is
terminated by the earlier rising edge of CE or WE. All
address inputs must be kept valid throughout the write
cycle. WE must return to the high state for a minimum
recovery time (t
WR
) before another cycle can be initi-
ated. The OE control signal should be kept inactive
(high) during write cycles to avoid bus contention. How-
ever, if the output drivers are enabled (CE and OE ac-
tive) then WE will disable the outputs in t
ODW
from its
falling edge.
DATA RETENTION MODE
The DS1220Y provides full functional capability for V
CC
greater than 4.5 volts and write protects at 4.25 nominal.
Data is maintained in the absence of V
CC
without any
additional support circuitry. The DS1220Y constantly
monitors V
CC
. Should the supply voltage decay, the NV
SRAM automatically write protects itself, all inputs be-
come “don’t care,” and all outputs become high imped-
ance. As V
CC
falls below approximately 3.0 volts, a
power switching circuit connects the lithium energy
source to RAM to retain data. During power-up, when
V
CC
rises above approximately 3.0 volts, the power
switching circuit connects external V
CC
to RAM and dis-
connects the lithium energy source. Normal RAM oper-
ation can resume after V
CC
exceeds 4.5 volts.