Rainbow Electronics ATA6625 - Manual (Page 17)

17
4957E–AUTO–10/07
ATA6623/ATA6625
9 LIN Bus Receiver
9.1
Center of receiver
threshold V
BUS_CNT
=
(V
th_dom
+ V
th
_
rec
)/2
LIN V
BUS_CNT
0.475
×
V
S
0.5
×
V
S
0.525
×
V
S
V A
9.2 Receiver dominant state V
EN
= 5V LIN V
BUSdom
–27 0.4
×
V
S
V A
9.3 Receiver recessive state V
EN
= 5V LIN V
BUSrec
0.6
×
V
S
40 V A
9.4
Receiver input
hysteresis
V
hys
= V
th_rec
– V
th_dom
LIN V
BUShys
0.028
×
V
S
0.1 x V
S
0.175
×
V
S
V A
9.5
Pre-wake detection LIN
High level input voltage
LIN V
LINH
V
S
– 1V
V
S
+
0.3V
V A
9.6
Pre-wake detection LIN
Low level input voltage
Activates the LIN receiver LIN V
LINL
–27 V
S
– 3.3V V A
10 Internal Timers
10.1
Dominant time for
wake–up via LIN bus
V
LIN
= 0V t
bus
30 90 150 µs A
10.2
Time delay for mode
change from Pre-normal
into Normal mode via pin
EN
V
EN
= 5V t
norm
5 20 µs A
10.3
Time delay for mode
change from Normal
mode to Sleep mode via
pin EN
V
EN
= 0V t
sleep
2 7 15 µs A
10.4
TXD dominant time out
timer
V
TXD
= 0V t
dom
6 13 20 ms A
10.5 Duty cycle 1
TH
Rec(max)
= 0.744
×
V
S
TH
Dom(max)
= 0.581
×
V
S
V
S
= 7.0V to 18V
t
Bit
= 50 ms
D1 = t
bus_rec(min)
/(2
×
t
Bit
)
D1 0.396 A
10.6 Duty cycle 2
TH
Rec(min)
= 0.422
×
V
S
TH
Dom(min)
= 0.284
×
V
S
V
S
= 7.6V to 18V
t
Bit
= 50 ms
D2 = t
bus_rec(max)
/(2
×
t
Bit
)
D2 0.581 A
10.7 Duty cycle 3
TH
Rec(max)
= 0.778
×
V
S
TH
Dom(max)
= 0.616
×
V
S
V
S
= 7.0V to 18V
t
Bit
= 96 ms
D3 = t
bus_rec(min)
/(2
×
t
Bit
)
D3 0.417 A
10.8 Duty cycle 4
TH
Rec(min)
= 0.389
×
V
S
TH
Dom(min)
= 0.251
×
V
S
V
S
= 7.6V to 18V
t
Bit
= 96 ms
D4 = t
bus_rec(max)
/(2
×
t
Bit
)
D4 0.590 A
10.9
Slope time falling and
rising edge at LIN
V
S
= 7.0V to 18V
t
SLOPE_fall
t
SLOPE_rise
3.5 22.5 µs A
8. Electrical Characteristics (Continued)
5V < V
S
< 27V, –40°C < T
j
< 150°C; unless otherwise specified all values refer to GND pins.
No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter