Rainbow Electronics W982516CH - Manual (Page 36)

W982516CH
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Operating Timing Example, continued
Timing Chart of Read to Write Cycle
Note: The Output data must be masked by DQM to avoid I/O conflict
11 10 9 8 7 6 5 4 3 2 1 0
(1) CAS Latency=2
In the case of Burst Length = 4
Read
Read
Write
Write
D Q
D Q
( b ) Command
DQM
DQM
D0 D1 D2 D3
D0 D1 D2 D3
( a ) Command
(2) CAS Latency=3
Read Write
Read Write
D0 D1 D2 D3
( a ) Command
D Q
D Q
DQM
( b ) Command
DQM
D0 D1 D2 D3
Timing Chart of Write to Read Cycle
Read Write
0 11 10 9 8 7 6 5 4 3 2 1
Q0
Read
Q1 Q2 Q3
Read
Read Write
Write
Q0 Q1 Q2 Q3
Write
Q0 Q1 Q2 Q3
D0 D1 DQ
DQ
( a ) Command
DQ
DQ
DQM
( b ) Command
DQM
( a ) Command
( b ) Command
DQM
DQM
In the case of Burst Length=4
(1) CAS Latency=2
(2) CAS Latency=3
D0
D0 D1
Q0 Q1 Q2 Q3 D0