Rainbow Electronics MAX17000 - Manual (Page 13)

MAX17000
Complete DDR2 and DDR3 Memory
Power-Management Solution
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Pin Description (continued)
PIN NAME FUNCTION
14 TON
Switching Frequency Setting Input. An external resistor between the input power source and this
pin sets the switching frequency per phase according to the following equation:
T SW = C TON x (R TON + 6.5k )
where C TON = 16.26pF.
TON is high impedance in shutdown.
15 DH High-Side Gate-Driver Output. Swings from LX to BST. DH is low when in shutdown or UVLO.
16 LX Inductor Connection. Connect LX to the switched side of the inductor as shown in Figure 1.
17 BST
Boost Flying Capacitor Connection. Connect to an external 0.1μF, 6V capacitor as shown in Figure
1. The MAX17000 contains an internal boost switch.
18 DL Synchronous-Rectifier Gate-Driver Output. DL swings from V DD to PGND1.
19 V DD
Supply Voltage Input for the DL Gate Driver and 3.3V Reference/Analog Supply. Connect to the
system supply voltage (+4.5V to +5.5V). Bypass V
DD to power ground with a 1μF or greater
ceramic capacitor.
20 PGND1 Power Ground. Ground connection for the low-side MOSFET gate driver.
21 AGND Analog Ground. Connect backside exposed pad to AGND.
22 SKIP
Pulse-skipping Control Input. This input determines the mode of operation under normal steady-
state conditions and dynamic output voltage transitions:
High (> 2.4V) = Forced-PWM operation
Low (AGND) = Pulse-skipping mode
23 V CC
Controller Supply Voltage. Connect to a 4.5V to 5.5V source. Bypass V CC to AGND with a 1μF or
greater ceramic capacitor.
24 SHDN
Shutdown Control Input. Connect to V CC for normal operation. When SHDN is pulled low, the
MAX17000 slowly ramps down the output voltage to ground. When the internal target voltage
reaches 25mV, the controller forces DL low, and enters the low current (1μA) shutdown state.
When discharge mode is enabled by OVP (OVP = high), the CSL and VTT internal 16 discharge
MOSFETs are enabled in shutdown. When discharge mode is disabled by OVP (OVP = low), LX,
VTT, and VTTR are high impedance in shutdown.
A rising edge on SHDN clears the fault OV protection latch.
— EP Exposed Pad. Connect backside exposed pad to AGND.