American Magnetics 420 Power Supply Programmer - Manual (Page 89)

Rev. 7 71
Remote Interface Reference
SCPI Status System
event register returns a decimal value in the appropriate output buffer
which corresponds to the binary-weighted sum of all bits set in the
register.
An enable register (or bitmask) defines which bits in an event register are
reported to the Status Byte register group. An enable register can be both
written and queried. The
*CLS (clear status) command does not clear an
enable register. To enable or disable bits in an enable register, write a
decimal value which corresponds to the binary-weighted sum of the bits
you wish reported to the Status Byte register.
4.2.2.1 Status Byte Register
The Status Byte register group reports conditions from the Standard
Event register or output buffers. Data in the output buffer is immediately
reported in the “IEEE-488 Message Available” bit (bit 4) or the “Serial
Message Available” bit (bit 3). Clearing a bit in the Standard Event
register will update the corresponding bit in the Status Byte register,
according to the Standard Event enable register. Reading the pending
messages in the output buffers will clear the appropriate “Message
Available” bit. The bit definitions for the Status Byte register are defined
in Table 4-1.
The Status Byte register provides the capability of generating a user-
defined IEEE-488 service request (SRQ) by enabling the desired bits using
the
*SRE < value > command. If a Status Byte register bit is enabled, then
when that bit is set, an SRQ is generated on the IEEE-488 bus. For
Table 4-1. Bit definitions for the Status Byte register.
Bit Number
Decimal
Value Definition
0 Not Used 1 Always “0”.
1 Not Used 2 Always “0”.
2 Quench Condition 4 The Model 420 has detected a
quench.
3 Serial Message
Available
8 The serial output buffer contains
unread data.
4 IEEE-488 Message
Available
16 The IEEE-488 output buffer contains
unread data.
5 Standard Event 32 One or more enabled bits are set in
the Standard Event register.
6 Status Byte
Summary
64 One or more enabled bits are set in
the Status Byte register.
7 Not Used 128 Always “0”.