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Functional block diagram – Texas Instruments MSP430x11x1 User Manual

Page 2

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MSP430x11x1
MIXED SIGNAL MICROCONTROLLER

SLAS241C – SEPTEMBER 1999 – REVISED JUNE 2000

2

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

AVAILABLE OPTIONS

PACKAGED DEVICES

TA

PLASTIC

20-PIN SOWB

(DW)

PLASTIC

20-PIN TSSOP

(PW)

40

°

C to 85

°

C

MSP430C1111IDW

MSP430C1121IDW

MSP430F1101IPW
MSP430F1121IPW

– 40

°

C to 85

°

C

MSP430F1101IDW
MSP430F1121IDW

functional block diagram

Oscillator

System Clock

ACLK

SMCLK

1/2/4 KB ROM/

’C’: ROM

128/256B

RAM

Power-on-

Reset

I/O Port P1

8 I/O’s, All With

Interrupt

CPU

Incl. 16 Reg.

Test

JTAG

Bus

Conv.

MAB, 16 Bit

MDB, 16 Bit

MAB, 4 Bit

MDB, 8 Bit

MCB

XIN

XOUT

VCC

VSS

RST/NMI

P1.0–7

DCOR

ACLK

P2.0 / ACLK

Rosc

TEST

’F’: Flash

Outx

Timer_A

3 CC

CCR0/1/2

Watchdog

Timer

15/16 Bit

MCLK

x = 0, 1, 2

ACLK

SMCLK

Outx

CCIx

CCIx

TACLK or

INCLK

INCLK

Out0

CCI0

JTAG

CCIxA

TACLK

SMCLK

I/O Port P2

6 I/O’s All With

8

Capabililty

Interrupt

Capabililty

Register

CCI1

Comparator-A

Input Multiplexer

RC Filtered O/P

Internal Vref

Analog Switch

P2.1 / INCLK

P2.2 / CAOUT/TA0

P2.5 / Rosc

P2.4 / CA1/TA2

P2.3 / CA0/TA1

CCI1

Flash+126/256B

Flash INFO

† A pulldown resistor of 30 k

is needed on F11x1.