Renesas Emulator System SH7362 - Manual (Page 27)

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The RCLK watchdog timer operates only when the user program is executed. Do not
change the value of the frequency change register in the [IO] window or [Memory] window.
The internal I/O registers can be accessed from the [IO] window. However, note the
following when accessing the SDMR register of the bus-state controller. Before accessing
the SDMR register, specify addresses to be accessed in the I/O-register definition file
(SH7362.IO) and then activate the High-performance Embedded Workshop. After the I/O-
register definition file is created, the MPU’s specifications may be changed. If each I/O
register in the I/O-register definition file differs from addresses described in the hardware
manual, change the I/O-register definition file according to the description in the hardware
manual. The I/O-register definition file can be customized depending on its format. Note
that, however, the E10A emulator does not support the bit-field function.
• Verify
In the [IO] window, the verify function of the input value is disabled.
15. Illegal Instructions
If illegal instructions are executed by STEP-type commands, the emulator cannot go to the
next program counter.
16. [Reset CPU] and [Reset Go] in the [Debug] Menu
When [Reset Mode] of the [Configuration] dialog box is set as [Auto], an H-UDI reset is
issued by executing [Reset CPU] or [Reset Go]. For the H-UDI reset, the clock pulse
generator and RCLK watchdog timer are not initialized.
When [User] is selected and [Reset CPU] or [Reset Go] is executed, a reset signal input from
the user system is waited; do not input /RESETP.