XLi IEEE 1588 Clock
135
997-01510-03, Rev. C, 12/12/2006
2
5
1
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
For example, enter:
F131 B4 S
Response:
F131 B4:
PROTOCOL:
SI BURST
PORT
16 DISABLE ENABLE
SDN: _DFLT
CLK CONFIG: SLAVE PRI
SLAVE SYNC THRESHOLD: 5 microsec
PREFERRED MASTER: ENABLE
