Samsung S3C8275X - Manual (Page 111)

S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X CONTROL REGISTER
4-41
SIOCON
— SIO Control Register E1H Set 1, Bank 0
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
Reset Value 0 0 0 0 0 0 0 0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Addressing Mode Register addressing mode only
.7 SIO Shift Clock Selection Bit
0 Internal clock (P.S clock)
1 External clock (SCK)
.6 Data Direction Control Bit
0 MSB-first mode
1 LSB-first mode
.5 SIO Mode Selection Bit
0 Receive-only mode
1 Transmit/receive mode
.4 Shift Clock Edge Selection Bit
0 Tx at falling edges, Rx at rising edges
1 Tx at rising edges, Rx at falling edges
.3 SIO Counter Clear and Shift Start Bit
0 No action
1 Clear 3-bit counter and start shifting
.2 SIO Shift Operation Enable Bit
0 Disable shifter and clock counter
1 Enable shifter and clock counter
.1 SIO Interrupt Enable Bit
0 Disable SIO interrupt
1 Enable SIO interrupt
.0 SIO Interrupt Pending Bit
0 No interrupt pending (when read), Clear pending bit (when write)
0 Interrupt is pending (when read)