10 receiver buffer register (rbr), Figure 23. receiver buffer register (rbr), 11 divisor latch registers (dlm and dll) – Intel 537EX User Manual

Page 101: Figure 24. divisor latch registers (dlm and dll), Table 29. programmable data rates, Receiver buffer register (rbr), Divisor latch registers (dlm and dll), Programmable data rates, Intel confidential

536EX Chipset Developer’s Manual

101

Intel Confidential

Parallel Host Interface 16C450/16C550A UART

9.2.10

Receiver Buffer Register (RBR)

The RBR (Receiver Buffer register) is a read-only register used for receiving data and AT
command responses from the modem.

9.2.11

Divisor Latch Registers (DLM and DLL)

The LS divisor latch (least-significant byte) and MS divisor latch (most-significant byte) are two
read/write registers used to set the modem data rate. The data rate is selected by loading each
divisor latch with the appropriate hex value. The programmable data rates are provided in the
following table. For example, to use a data rate of 2400 bps, load a $00h into the DLM and a $30h
into the DLL.

Figure 23. Receiver Buffer Register (RBR)

RBR

(DLAB = 0)

Figure 24. Divisor Latch Registers (DLM and DLL)

DLM (MS)

(DLAB = 1)

DLL (LS)

(DLAB = 1)

Table 29. Programmable Data Rates

Data Rate

Divisor Number

Divisor Latch (Hex)

(Decimal)

300

384

1200

2400

4800

7200

9600

19200

38400

57600 2