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10 receiver buffer register (rbr), Figure 23. receiver buffer register (rbr), 11 divisor latch registers (dlm and dll) – Intel 537EX User Manual

Page 101: Figure 24. divisor latch registers (dlm and dll), Table 29. programmable data rates, Receiver buffer register (rbr), Divisor latch registers (dlm and dll), Programmable data rates, Intel confidential

10 receiver buffer register (rbr), Figure 23. receiver buffer register (rbr), 11 divisor latch registers (dlm and dll) | Figure 24. divisor latch registers (dlm and dll), Table 29. programmable data rates, Receiver buffer register (rbr), Divisor latch registers (dlm and dll), Programmable data rates, Intel confidential | Intel 537EX User Manual | Page 101 / 104 10 receiver buffer register (rbr), Figure 23. receiver buffer register (rbr), 11 divisor latch registers (dlm and dll) | Figure 24. divisor latch registers (dlm and dll), Table 29. programmable data rates, Receiver buffer register (rbr), Divisor latch registers (dlm and dll), Programmable data rates, Intel confidential | Intel 537EX User Manual | Page 101 / 104
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