Grass Valley 2010RDA - Manual (Page 25)

2010/2011RDA Instruction Manual 19
Functional Description
Routing and Control FPGA
The signals from the AES receiver ICs are applied to the Routing and
Control FPGA. The signal routing is determined by the setting of the on-
board configuration jumper at the front of the module. After processing,
the signals are embedded into an AES stream and applied to the Output
Drivers.
The Routing and Control section also drives the front panel LEDs and inter-
faces to the Controller section.
Controller
The Controller interfaces with the Routing and Control FPGA, the
EEPROM and the 2000 Frame Bus. The Controller also provides the FPGA
code that is downloaded to the FPGA during boot-up.
The Controller section handles local control and monitoring, as well as
remote control and monitoring via the frame bus (when an 2000NET
module is installed in the frame). Module settings are stored in the
EEPROM for power up recall.
Power Supply
Power is fed from +24 V rails of the frame’s switching power supply. Each
stage of the module receives its own, separate, highly regulated and filtered
power source.