Rsl cable assembly, Rsl interface, Local bus – Sundance SMT407 User Manual
Page 23: Clocks, Table 2: rsl speed vs. fpga speed grade
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Page 23 of 38
SMT407 User Manual
RSL Cable Assembly
Cable assemblies with QTE connectors on one side and QSE on the other are like
the flexible versions of the PCB adapters mentioned above.
RSL Interface
The RSL connectors are the fastest FPGA connections available on SMT407.
As RSL are based on RocketIO transceiver blocks, the speed is limited by the speed
grade of FPGA installed:
Speed grade
-7
-6
-5
RSL speed (Gbps)
3.125
3.125
2.0
Table 2: RSL Speed vs. FPGA Speed Grade
Based on the above, the 12 bi-directional links of SMT407 can provide a combined
bandwidth of up to 37.5Gbps.
The RSL connectors are J2 and JA4. (See
Figure 10: SMT407 Components placement-
Top view and See
Figure 11: SMT407 Components placement-Bottom view)
The RSL connector on the front of the board (J2) is of type “RSL Top”. The RSL
connector on the back of the board (JA4) is of type “RSL Bottom”.
works.
Local bus
Clocks
The FPGA is provided with the following clocks:
Description Speed
DSPA EMIFA clock
100MHz*
DSPB EMIFA clock
100MHz*
QL5064 Local bus clock
50MHz
RSL LVDS clock
125MHz
* Standard only on DSP modules. TI specs allow this clock to go as high as 133MHz,
but keep in mind that this clock will also be used for the SDRAM.