Virtex fpga design, Ti jtag controller – Sundance SMT407 User Manual
Page 12
Version 1.0.0
Page 12 of 38
SMT407 User Manual
Virtex FPGA design
Once the FPGA has been programmed the user may then communicate with the
design by means of CS regions 2 and 3. 12 address lines allow for a total
addressable space of 4kB per CS region. Accesses to these regions may be up to
64-bits wide.
An example of this is provided in the SMT6041-407 software package available from
SUNDANCE.
TI JTAG controller
For DSP boards the Texas Instruments SN74ACT8990 is installed. This Test Bus
Controller (TBC) provides XDS510 compatible performance.
Special driver software is required to operate this device. Please contact
SUNDANCE for more information.
See also other documents in the category Sundance Equipment:
- SMT107 (16 pages)
- SMT6035 v.2.2 (39 pages)
- SMT6012 v.4.6 (22 pages)
- FC100 (12 pages)
- FC108 v.1.1 (10 pages)
- SMT6065 v.4.0 (45 pages)
- FFT v.2.1 (19 pages)
- SMT111 (18 pages)
- SMT118LT (10 pages)
- SMT118 (20 pages)
- SMT123-SHB (13 pages)
- SMT128 (15 pages)
- SMT145 (18 pages)
- SMT148 (35 pages)
- SMT130 v.1.0 (46 pages)
- SMT148FX (48 pages)
- SMT310Q (55 pages)
- PARS (70 pages)
- SMT166-FMC (52 pages)
- SMT166 (44 pages)
- SMT300Q v.1.6 (61 pages)
- SMT310 v.1.6 (50 pages)
- SMT317 (24 pages)
- SMT326v2 (24 pages)
- SMT338 (19 pages)
- SMT349 (32 pages)
- SMT339 v.1.3 (27 pages)
- SMT338-VP (22 pages)
- SMT358 (25 pages)
- SMT351T (37 pages)
- SMT351 (25 pages)
- SMT350 (45 pages)
- SMT362 (30 pages)
- SMT365G (23 pages)
- SMT364 (37 pages)
- SMT373 (15 pages)
- SMT368 (24 pages)
- SMT370v3 (46 pages)
- SMT377 (22 pages)
- SMT381 2007 (31 pages)
- SMT381-VP (81 pages)
- SMT387 (42 pages)
- SMT391 (18 pages)
- SMT384 (47 pages)
- SMT390-VP (55 pages)