Sundance SMT407 - Manual (Page 15)

Version 1.0.0 Page 15 of 38 SMT407 User Manual
The ROM holds boot code for the C60, configuration data for the FPGA, and optional
user-defined code.
The EMIFB CE1 and CE2 space control registers should be programmed with the
value 0xFFFFFF03.
As the C60 only provides 20 address lines on its EMIFB, both CE1 & CE2 are used
to access this device. This in itself allows the direct access of 4MB. A paging
mechanism is used to select which half of the 8MB device is visible in this 4MB
window.
As the EMIFB CE1 & 2 memory spaces alias throughout the available range, the
flash device can be accessed using the address range 0x67E00000-0x681FFFFF.
This gives a 4MB continuous space.
The flash can be divided into the four logical sections shown in the following figure
(paging bit is bit 21).
Page0
(2 MBytes)
Page1
(2 MBytes)
Page1
(2 MBytes)
0x67C00000
0x67E00000
0x68000000
0x68200000
0x68400000
CE0
CE1
Page0
(2 MBytes)
Section 1
Section 2
Section 3
Section 4
Figure 4: Flash logical sections
To change the state of the page bit, you need to write to the following address as
shown (the data written are irrelevant):
Address Flash page selected
0x6C000000 Page 0 (1
st
and 3r
d
sections enabled)
0x6C000001 Page 1 (2
nd
and 4
th
sections enabled)
The EMIFB CE0 space control register should be programmed with the value
0xFFF0C003.
Virtex FPGA
The SMT407 incorporates a Xilinx Virtex II Pro XC2VP50 FPGA (XC2VP20,
XC2VP30, and XC2VP40 are also possible). This device controls the majority of the
I/O functionality on the module, including the Comports, SHBs, timers and interrupts.