Sundance SMT407 - Manual (Page 14)

Version 1.0.0 Page 14 of 38 SMT407 User Manual
The C60 contains several registers that control the external memory interfaces
(EMIFs). A full description of these registers can be found in the C60 Peripherals
Reference Guide.
The standard bootstrap will initialise these registers to use the following resources:
Memory
space
(EMIFA)
Resource Address range
Internal program memory
(1MB) 0x00000000 - 0x000FFFFF
CE0 SDRAM (2x 8MB chips) 0x80000000 - 0x807FFFFF
CE3 Virtex 0xB0000000 - 0xBFFFFFFF
Entries in the following table apply to DSPA only!
Memory
space
(EMIFB)
Resource Address range
CE0 DSB HPI 0x60000000 – 0x601FFFFF
CE1 1
st
/ 3
rd
section of flash (2MB
each)
0x64000000 – 0x641FFFFF
CE2 2
nd
/ 4
th
section of flash (2MB
each)
0x68000000 – 0x681FFFFF
SDRAM
Memory space CE0 is used to access 16MB of SDRAM over EMIFA. The SDRAM
operates with a max frequency of 133MHz. The speed of this interface is determined
by a clock oscillator on the board. This speed adjustment is not a user option, but
must be adjusted during manufacture.
The EMIFA CE0 memory space control register should be programmed with the
value 0x00000030.
Note that the DSP only has 20 address pins on the EMIFA, but since address bits are
multiplexed for SDRAM a maximum addressable space of 128MB is possible.
FLASH
An 8MB Flash ROM device is connected to the C60 EMIFB.