Sundance SMT381 2007 - Manual (Page 5)

Table of Figures
Figure 1: block diagram of the SMT381 ................................................................................9
Figure 2: Clock tree of the SMT381 .....................................................................................11
Figure 3. Option 1 for the SMT381 analog output stage. ...................................................12
Figure 4. Option 2 for the SMT381 analog output stage. ...................................................13
Figure 5: Combined analogue output circuit.......................................................................13
Figure 6: Waveform Memory - Time View Capture – 1000Msps (VCO) – 125MHz
analogue output ............................................................................................................14
Figure 7: Measurements of Capture – 1000Msps (VCO) – 125MHz analogue output......15
Figure 8: Waveform Memory - FFT – 1000Msps (VCO) – 125MHz analogue output –
Channel A......................................................................................................................15
Figure 9: Waveform Memory - FFT – 1000Msps (VCO) – 125MHz analogue output –
Channel B......................................................................................................................16
Figure 10: Waveform Memory - FFT – 600Msps (VCO) – 75MHz analogue output –
ChannelA.......................................................................................................................16
Figure 11: Waveform Memory - FFT – 600Msps (VCO) – 75MHz analogue output –
ChannelB.......................................................................................................................17
Figure 12: Connector Location on SMT381.........................................................................18
Figure 13: Test point locations on the SMT381 ..................................................................20
Figure 14: example block diagram.......................................................................................21
Figure 15 Setup Packet Structure .......................................................................................22
Figure 16: Packet Structure – Defined Commands: ...........................................................22
Figure 17: Reset Register (Write Only) ...............................................................................28
Figure 18: Temperature Registers (Read Only) ..................................................................29
Figure 19: Clock Source Selection Table (Write Only) .......................................................29
Figure 20: PLL Setup Registers (Write Only) .....................................................................30
Figure 21: Data Source Selection.........................................................................................31
Figure 22: DAC Setup Registers (Write Only) ....................................................................31
User Manual SMT381 Page 5 of 31 Last Edited: 12/06/2007 10:43:00