Sundance SMT381 2007 - Manual (Page 25)

Input 0 Used to reset the task.
Output 0 Bit 0: the clock used to send data to the DAC.
Bit 1: the clock used to send data to the DAC divided by two.
Bit 2: the clock used to send data to the DAC divided by four.
Bit 3: the clock used to send data to the DAC divided by eight.
Bit 4: the “locked” signal of the DCM used in this task.
The Diamond clock domain generated by this task should be used to clock task
“DAC381”.
7.1.4 Clock_dac_381v4_div4 task
This task generates a Diamond clock domain running at one eighth the sampling
frequency of the DAC. It receives the clock from its input channel which should be
connected to task “clock_dac_381v4”.
7.1.5 DAC381 task
This task interfaces to the DAC. It receives the samples for the DAC on its input
channels and sends them to the LVDS interface of the DAC.
This task interfaces to the two DDR 14-bits LVDS ports of the DAC.
It runs at half the sampling frequency of the DAC.
Input 0
Samples for channel A.
Input 1 Samples for channel B.
Input 2 Bit 0: reset the task when ‘1’.
Input channels 0 and 1 carry two samples at a time on the 32 lower bits of their data
bus.
Bits 15 to 0: first sample
Bits 31 to 16: second sample
7.1.6 Sine task
This task generates the samples of a sine-wave.
7.1.7 Duplicate task
This task duplicates on two output channels the data coming on its input channel.
User Manual SMT381 Page 25 of 31 Last Edited: 12/06/2007 10:43:00