Sundance SMT381 2007 - Manual (Page 24)

0x01D Reserved 0x01D Reserved
0x01E Reserved 0x01E Reserved
0x01F Reserved 0x01F Reserved
0x020 Reserved 0x020 Smt338AirTempReg
0x021 Reserved 0x021 Smt338DiodeTempReg
0x022 Reserved 0x022 Reserved
0x023 Reserved 0x023 Reserved
0x024 Reserved 0x024 Reserved
0x025 Reserved 0x025 Reserved
0x026 Reserved 0x026 Reserved
0x027 Reserved 0x027 Reserved
0x028 Reserved 0x028 DaughterCardAirTempReg
0x029 Reserved 0x029 DaughterCardDiodeTempReg
DAC Module Specific DAC Module Specific
0x800 Smt381AdjClkCntrlReg * 0x800 Reserved
0x801 Smt381ClockSourceSelect 0x801 Reserved
0x802 Smt381Pll_IfR_Reg1 0x802 Reserved
0x803 Smt381Pll_IfR_Reg2 0x803 Reserved
0x804 Smt381Pll_IfN_Reg1 0x804 Reserved
0x805 Smt381Pll_IfN_Reg2 0x805 Reserved
0x806 Smt381Pll_RfR_Reg1 0x806 Reserved
0x807 Smt381Pll_RfR_Reg2 0x807 Reserved
0x808 Smt381Pll_RfN_Reg1 0x808 Reserved
0x809 Smt381Pll_RfN_Reg2 * 0x809 Reserved
0x80A Reserved 0x80A Reserved
0x80B Reserved 0x80B Reserved
0x80C Reserved 0x80C Reserved
0x80D Reserved 0x80D Reserved
0x80E Data Source Selection 0x80E Reserved
0x80F Reserved 0x80F Reserved
0x900 Smt381SetupData 0x900 Reserved
0x901 Smt381DacAddress 0x901 Reserved
Table 4: registers memory map
7.1.3 Clock_dac_381v4 task
This task generates the clock that is used to send the samples to the DAC. It
implements a Delay Locked Loop.
The task has 1 input channel and 1 output channel.
User Manual SMT381 Page 24 of 31 Last Edited: 12/06/2007 10:43:00