Sundance SMT381 2007 - Manual (Page 11)

Figure 2: Clock tree of the SMT381
The main clock tree of the SMT381 consists of two clock sources to achieve the DAC’s full
range of input frequencies (DC – 500MHz). The first clock source is a MICREL clock
synthesizer which has a range from 50MHz to 950MHz. This source’s disadvantage
however is that it has a jittery output and thus the clock is not that stable. Its advantage
however is that it can attain a wide range of frequencies, especially the lower
frequencies. The output clock is LVPECL.
The second clock source is a Voltage Controlled Oscillator (VCO) with a phase lock loop.
This combination has a very stable output. However a limited frequency range can be
attained by this combination (300MHz – 600MHz). This is achieved by taking a 600MHz
-1200MHz VCO and dividing the output by 2. The output clock must also be scaled to
LVPECL.
Alternatively the user can provide the module with an external LVPECL clock or an
external RF clock. The user can select between any of these input clocks.
User Manual SMT381 Page 11 of 31 Last Edited: 12/06/2007 10:43:00