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1 smt381control task, 2 registers_381 task, 1 protocol – Sundance SMT381 2007 User Manual

Page 22: Smt381control task, Registers_381 task, Figure 15 setup packet structure, Figure 16: packet structure – defined commands

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The samples generated by task sine are duplicated by task duplicate. Each channel is
sent to task DAC381 which sends the samples to the DAC.

Task registers_381 implements the registers used to control the firmware and the
SMT381 daughter board. Task SMT381Control is a software task which configures the
registers to control the SMT381 and the application. Task clock_dac_381v4 manages
the clocks used to generate the samples in the FPGA and to send them to the DAC.

More details about each task are provided in the following section.

7.1.1 SMT381Control task
This software task allows controlling the SMT381 daughter module.
The task uses a GUI running on the host to select the sampling frequency of the DAC,
the source of the clock and other advanced parameters.

7.1.2 Registers_381 task
This task implements the registers used to control the SMT381 daughter board and the
firmware.
The task has 1 input channel and 2 output channels.

Input 0

Used to read or write the registers.

Output 0 Carries the content of the register that is been read.
Output 1 Carries information used to control the firmware.

7.1.2.1 Protocol
The registers are accessed by writing to input channel 0. The data written to input
channel 0 follow the following protocol to read and write the registers.

31 .. 28

27 .. 24

23 .. 20

19 .. 16

15 .. 12

11 .. 8

7 .. 4

3 .. 0

Command Address

Data

Figure 15 Setup Packet Structure

The commands are the following:

Command Value

Command Description

0x0 Reserved

0x1

Write the data in the register selected by the address

0x2

Read the data stored in the register selected by the
address. The data is sent on the output channel 0.

Others Reserved

Figure 16: Packet Structure – Defined Commands:

User Manual SMT381

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Last Edited: 12/06/2007 10:43:00