3 fpga, 4 cpld, 5 prom – Sundance SMT368 User Manual
Page 9: 6 zbtram, Fpga, Cpld, Prom, Zbtram, Figure 2:fpga connections to bank1 of zbt
4.1.3 FPGA
Xilinx Virtex-4 XC4VSX35™ - Device package FFG668.
This device has 448 I/O-pin BGA package with a -10 speed grade.
It contains up to 34,560 logic cells and 192 XtremeDSP™ Slices.
4.1.4 CPLD
Xilinx CoolRunner-II XC2C128™ - Device package 6VQG100C.
This device has 100 I/O-pin QFP package with a -6 speed grade.
It provides the option to configure the FPGA via ComPort_3 or ComPort_0.
This is ideal for fast in systems debugging/prototyping and development of your FPGA
design.
The CPLD programming code is NOT to be modified without the Sundance prior
approval.
4.1.5 PROM
Xilinx Flash PROM XCF32™ - Device package VOG48
This device contains 128 macro-cells.
This device is programmed via JTAG.
The PROM automatically configures the FPGA at power-up or reset.
It uses parallel FPGA configuration interface performing at up to 33MHz, and it has a built-in
data decompressor compatible with the Xilinx advanced compression technology.
4.1.6 ZBTRAM
Samsung NtRAM – Device part number
Up to 8MB of pipeline ZBT memory is provided with direct access to the FPGA.
Figure 2:FPGA connections to Bank1 of ZBT
User Manual SMT368
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Last Edited: 31/12/2008 13:53:00