Sundance SMT300Q v.1.6 - Manual (Page 9)

User Manual (QCF42); Version 3.0, 8/11/00; © Sundance Multiprocessor Technology Ltd. 1999
2 Functional Description
Figure 1 gives the block diagram of the SMT300Q. The Slave Module sites (2–4) are
not shown, as they do not have any direct interface to the CompactPCI Bus, SRAM,
ComPort or JTAG sections of the design. The connectivity of slave sites is shown in
Figure 2.
The CompactPCI interface connects to a Quick Logic EPC363 bridge device. It has a
32-bit 33MHz CompactPCI interface that supports I
2
C control, mailbox register
access, and direct memory reads and writes. The CompactPCI bus is translated to a
Local bus, which is connected to the following devices:
• Shared SRAM 1MB
• Control EPLD that manages ComPort access
• JTAG
controller
• Module Global Bus
• CompactPCI Bridge device
An on-board arbitration unit controls which device, Master Module or CompactPCI
Bridge, has access to this local bus resource.
The local bus has a 33MHz clock to control transfers between the various resources.
This is available on the CLKIN pin on the Master site and should be selected in
preference to the on-board oscillator to allow the DSP to synchronise its accesses to
and from the CompactPCI Bridge registers. The CompactPCI Bridge has an input
and output FIFO capable of transferring 256 32-bit words of data to and from the
DSP at 33MHz, thus bursting a maximum local bus transfer rate of 132MB/s.
The Master Module can access the SRAM over the local bus at transfer rates up to
100MB/s. The number of wait states required by the Master Module will vary
depending on the speed of the module. Maximum access rates use a 20ns strobe
cycle.
The JTAG controller is based on the TI 8990 device, and drivers can be supplied for
Code Composer Studio (Part Number
SMT6012 ). The presence of a TIM in a
module site causes its SENSE pin to switch the module into the JTAG chain.
ComPort communication from the Host to the Master Module site is switched through
a quick-switch, as illustrated in Figure 1. This allows the following connectivity:
• Connect the Host to the Master Module’s ComPort 3 (T1C3) and connect the
FMS (C_BUF) directly to the external buffered ComPort. This allows any of
the ComPorts on sites 1—4 to be connected to the external buffered ComPort
with an FMS cable; or
• Connect the Host to the external buffered ComPort and connect ComPort 3 of
the Master site to the FMS connector (C_BUF).