Sundance SMT300Q v.1.6 - Manual (Page 6)

Page 6 of 61 SMT300Q SMT300Q User Guide V1.65
Table of Tables
Table 1 : Table of Abbreviations ..................................................................................7
Table 2 : I/O address space map...............................................................................14
Table 3 : Memory space map ....................................................................................15
Table 4 : Memory space map ....................................................................................16
Table 6 : COM-SWITCH Register..............................................................................19
Table 7: Buffered ComPort 1 connections .................................................................20
Table 8: Buffered ComPort 2 connections .................................................................20
Table 9: Buffered ComPort 3 connections .................................................................20
Table 10: Buffered ComPort 4 connections ...............................................................20
Table 11: Buffered ComPort 5 connections ...............................................................21
Table 12: Buffered ComPort 6 connections ...............................................................21
Table 13: Buffered ComPort 7 connections ...............................................................21
Table 14: Buffered ComPort 8 connections ...............................................................22
Table 15 : Buffered ComPort Additional Signals........................................................22
Table 16 : Control Register........................................................................................23
Table 17 : Status Register .........................................................................................24
Table 18 : Interrupt Control Register..........................................................................25
Table 19 : PLLREG1 Register ...................................................................................26
Table 20 : PLLREG2 Register ...................................................................................26
Table 21 : PLL Frequency Select ..............................................................................26
Table 22 : PLL Phase Shift Select (Bank 2)...............................................................27
Table 23 : PLL Phase Shift Select (Bank 3 and 4).....................................................27
Table 24 : JTAG Header pin function.........................................................................32
Table 25 : CompactPCI Interrupt Configuration Register...........................................43
Table 26 : CompactPCI Interrupt Status Register......................................................44
Table 27 : Local Bus Interrupt Mask Register ...........................................................45
Table 28 : Local Bus Interrupt Status Register ..........................................................45
Table 29 : CompactPCI Mailbox WRITE/READ Interrupt Control Register................46
Table 30 : Local Bus Mailbox WRITE/READ Interrupt Control Register ....................46
Table 31 : Mailbox Write/Read Interrupt Status Register...........................................47
Table 32 : INTREG Register ......................................................................................48
Table 33 : Performance Figures ................................................................................51
Table 35 : Buffered ComPort connector pin out.........................................................55
Table 36 : Buffered JTAG connector pin functionality as JTAG source .....................56
Table 37 : Buffered JTAG connector pin functionality as JTAG master .....................57