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Measurement Computing PCM-DAS16D/12 User Manual

Page 31

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Throughput (post-process calibration)

100k samples/sec

Relative Accuracy (software calibrated)

±1 LSB

Differential Linearity error

±1 LSB

Integral Linearity

±1 LSB

Gain drift (A/D specs)

160 ppm/°C

Zero drift (A/D specs)

150 ppm/°C

Common Mode Range:

PCM-DAS16D/12

±10V

CMRR @ 60Hz:

PCM-DAS16D/12

−72 dB

Input leakage current

±20 nA

Input impedance

10 Mohms min

Absolute maximum input voltage

±15V

DIGITAL SECTION

Digital type

FPGA

Configuration

Two ports, four bits each. Pro-
grammable as 8 input / 8 output
or 4 input / 4 output

Input low voltage

0.8V max

Input high voltage

2.0V min

Output low voltage (IOL = 4mA)

0.32V max

Output high voltage (IOH = -4mA)

3.86V min

Absolute maximum input voltage

−0.5V , +5.5V

Interrupts

Programmable: levels 2 - 15

Interrupt enable

Programmable

Interrupt sources

End-of-conversion, FIFO-half-full,
external (Ext Int)

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