Foxconn C51XEM2AA-8EKRS2H - Manual (Page 41)

Chapter 3 BIOS Description
34
Memory Configuration menu
v SLI-Ready Memory
Enable memory settings that are SLI-Ready (only functional with
DRAM that is SLI-Ready).
v Memory Timings
Use this menu to control memory timings (see Memory Timings section
below).
v Drive Strength setting
Use this menu to control drive strength settings (see Drive Strength set-
tings section below).
v Dram on-die termination
Resistance of the on-die termination resistors.
v Read/Write queue bypass
Number of times to bypass the read/write queue.
v Bypass Maximum
Max number of times that the oldest memory access request can be
bypassed.
v 32 Byte Granularity
32/64 byte DRAM access granularity.
v NVMEM memory test
Run NVIDIA memory testing module during POST.
v DQS Training Control
Perform/Skip DQS training.
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