BECKHOFF EtherCAT Technology Section I - Manual (Page 37)

Physical Layer Common Features
Slave Controller – Technology I-17
4 Physical Layer Common Features
EtherCAT supports two types of Physical Layers, Ethernet and EBUS. The Ethernet interface of ESCs
is MII, RGMII, or RMII, connecting to an external Ethernet PHY according to IEEE 802.3 100BaseTX
or FX. For EBUS, the physical layer is integrated into the EtherCAT ASICs. EtherCAT requires 100
Mbit/s links with full duplex communication.
The MII interface of Beckhoff ESCs is optimized e.g. for low processing/forwarding delay. The
resulting additional requirements to Ethernet PHYs are described in the corresponding chapters.
4.1 Link Status
The link status of each port is available in the ESC DL Status register (0x0110:0x0111), most
important are the “Communication established” bits 15, 13, 11, and 9. Additional link information is
available in the PHY Port status register (0x0518:0x051B) if MI link detection and configuration is
used. All other status bits are mainly for debugging purposes. The link status bits are described in the
following table.
Table 10: Link Status Description
Status register
MII
EBUS
LINK_MII signal Management Interface
Standard link
detection
Enhanced
link
detection
Standard link
detection
Enhanced
link
detection
Standard link
detection
Enhanced
link
detection
ESC DL Status:
Physical link
0x0110[7:4] LINK_MII signal state LINK_MII signal combined with
MI Link Detection and
Configuration result
Result of the standard link
detection mechanism
ESC DL Status:
Communication
established
0x0110[15,13,11,9] LINK_MII
signal state LINK_MII
signal state
combined with
RX_ERR
threshold
state LINK_MII
signal
combined with
MI Link
Detection and
Configuration
result LINK_MII
signal
combined with
RX_ERR
threshold
state and MI
Link Detection
and
Configuration
result Result of the
standard link
detection
mechanism.
Result of the
enhanced link
detection
mechanism.
PHY port status:
physical link status
0x0518[0],
0x0519[0],
0x051A[0],
0x051B[0]
n.a.
PHY has detected link
(PHY Status register 1[2])
n.a.
PHY port status:
Link status
0x0518[1],
0x0519[1],
0x051A[1],
0x051B[1] PHY has detected link,
link is suitable for ECAT
If all ports are closed (either manually or automatically, e.g., because no port has a communication
link), port 0 is automatically opened as the recovery port. Reading and writing via this port is possible,
although the DL status register reflects the correct status. This can be used to correct erroneous DL
control register settings or to fix LINK_MII polarity configuration.