Altera First-In-First-Out Partitioner - Manual (Page 10)

8 Altera Corporation
FIFO Partitioner Megafunction User Guide Getting Started
Considering the restriction on the TDM_clk, it is easy to estimate the
performance of each FIFO based on the number of FIFOs implemented
and the reported f
MAX
of the TDM clock after compilation. Table 2 shows
approximate values for performance of various configurations given
best-case (275 MHz) TDM_clk performance, and a conservative estimate
of achievable TDM_clk performance (200 MHz).
Specifying a
FIFO
Partitioner
Function Using
the FIFO
Partitioner
MegaWizard You specify the desired FIFO Partitioner configuration using the
MegaWizard
®
Plug-In Manager. The wizard prompts you for the
following information:
■ How many FIFOs to implement
■ The individual configuration options for each FIFO
The wizard generates HDL files implementing the specified FIFO
Partitioner configuration, and a information file with information about
the FIFO Partitioner function. The information file contains frequency
requirements for the clocks associated with the function.
Table 2. Estimated Performance of FIFO Ports
Number of FIFOs (1)
f
MAX
of Each FIFO Port Assuming Bandwidth is
Shared Evenly (MHz)
TDM_clk at 275 MHz TDM_clk at 200 MHz (2)
2 91.67 66.6
3 91.67 66.6
4 68.75 50.00
5 55.00 40.00
6 45.83 33.3
7 39.28 28.6
8 34.37 25.00
9 30.56 22.20
10 27.50 20.00
Notes to Table 2 :
(1) Configurations with more than 10 FIFOs are not recommended for most designs
due to performance limitations.
(2) TDM_clk frequencies above 200 MHz are achievable. Refer to compilation
results for achievable f
MAX
for a given configuration.