Fifo status register – ADLINK PCI-9810 User Manual
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Registers
FIFO Status Register
Monitors some of the PCI-9812/9810 status.
Address: BASE + 18h
Attribute: Read
Data Format:
Bit
7
6
5
4
3
2
1
0
BASE+18h
—
—
ACQ
TD
PTCO
FIFOOR FIFOHF
FIFOIR
BASE+19h
—
—
—
—
—
—
—
—
BASE+1Ah
—
—
—
—
—
—
—
—
BASE+1Bh
—
—
—
—
—
—
—
—
Bit 0
FIFOIR, FIFO input ready flag.
0: FIFO is not ready for input; FIFO is full.
1: FIFO is ready for input (not full).
Bit 1
FIFOHF, FIFO half full flag.
0: FIFO is not half-full yet.
1: FIFO is at least half-full.
Bit 2
FIFOOR, FIFO output ready flag
0: FIFO is not ready for output; FIFO is empty.
1: FIFO is ready for output (not empty).
Bit 3
PTC0, post trigger counter is 0
0: Post trigger counter is not 0.
1: Post trigger counter reached 0.
Bit 4
TD, trigger detection flag
0: No trigger condition has been met; no trigger is detected.
1: Trigger is detected.
Bit 5
ACQ, acquisition flag
0: Card is not acquiring data. Card maybe disabled or is waiting
for a trigger.
1: Card is acquiring data.
Bit 6..31
Any value