ADLINK PXIe-9852 - Manual (Page 20)

10 Introduction
Table 1-5: PXIe-9852 I/O Array Legend
Name
Faceplate
Legend
Type Remark
CH0 N/A Blue
On indicates CH0 acquisition ongoing
Off indicates CH0 acquisition stopped
CH1 N/A Blue
On indicates CH1 acquisition ongoing
Off indicates CH1 acquisition stopped
Ext. Clock
Input
CLK IN
SMA
Screw
Input for external reference clock or
sample clock to digitizer
Ext. Digital
Trigger
Input
TRG IN
External digital trigger input, receiving
trigger signal from external instrument
and initiating acquisition
Trigger
Output
TRG OUT
Trigger output, in which every time
acquisition begins, a pulse
synchronized with Timebase clock
asserts and is output through this
connector, at pulse width
programmable from 50ns to 10μs via
software
Analog
Input
CH0 Analog input channel
Analog
Input
CH1 Analog input channel