ADLINK PXIS-2719A - Manual (Page 26)

16 Introduction
Priority of the 10MHz reference clock is as shown.
Table 1-6: 10MHZ Reference Clock Priority
Three indicators on the backplane indicate the 10MHz clock
source driven to all peripheral slots, as shown.
Figure 1-10: Clock Source Indicators
Table 1-7: Clock Source Indicators Legend
System Timing
Slot (2nd slot) BNC connector on
rear panel 10MHz clock driven to
peripheral slots
No clock present No clock present
The 10MHz clock is
generated by backplane.
No clock present
10MHz clock
present
Clock from BNC
connector is driven to all
the peripheral slots
10MHz clock
present
No clock present
Clock from system
timing slot is driven to all
the peripheral slots
10MHz clock
present 10MHz clock
present
Clock from system
timing slot is driven to all
the peripheral slots
A LEDs
B Resistors
LED1
R300 LED2
R301 LED3
R302
A
B