ADLINK PCI-8554 - Manual (Page 5)

Table of Contents • i
Table of Contents
Tables....................................................................................... iii
Figures ..................................................................................... iv
How to Use This Guide............................................................ v
Chapter 1 Introduction ............................................................ 1
1.1 Features ................................................................................................2
1.2 Applications ...........................................................................................3
1.3 Specifications ........................................................................................3
1.4 Software Supporting ..............................................................................5
1.4.1 Programming Library .................................................................5
1.4.2 PCIS-LVIEW: LabVIEW
®
Driver ................................................6
1.4.3 PCIS-VEE: HP-VEE Driver ........................................................6
1.4.4 DAQBench
TM
: ActiveX Controls.................................................6
Chapter 2 Getting Started ....................................................... 7
2.1 What You Have .....................................................................................7
2.2 Unpacking..............................................................................................7
2.3 PCB Layout of cPCI/PCI-8554/R ...........................................................8
2.4 Default Jumper Setting ..........................................................................9
2.5 cPCI/PCI-8554/R Installation ...............................................................11
2.5.1 Hardware configuration............................................................11
2.6 Device Installation for Windows Systems ............................................12
2.7 Pin Assignment of Connector ..............................................................13
2.8 Clock System.......................................................................................15
2.9 Counters Architecture..........................................................................15
2.9.1 Independent Counters (Counter 1~10) ....................................17
2.9.2 Cascaded Counters .................................................................17
2.9.3 User Configurable Cascaded Counters ...................................18
2.10 Clock Source Configurations...............................................................19
2.11 Gate Control Configurations................................................................20
2.12 Counter Outputs..................................................................................20
2.13 Debounce System...............................................................................21
2.14 Interrupt System..................................................................................22
2.15 Digital Input and Output ......................................................................23
2.16 12V and 5V Power Supply ..................................................................24
Chapter 3 Registers ............................................................... 25
3.1 PCI PnP Registers...............................................................................25
3.2 I/O Address Map..................................................................................26
3.3 Timer/Counter Registers .....................................................................27
3.4 Timer / Counter Clock Mode Control ...................................................27
3.5 Digital Input Register ...........................................................................28
3.6 Digital Output Register .......................................................................29