ADLINK PCI-8554 - Manual (Page 24)

14 • Getting Started
(2) +12V (27) GND (52) GOUT2 (77) COUT8
(3) +12V (28) GND (53) GIN2 (78) GATE8
(4) Vcc (29) GND (54) GND (79) ECLK8
(5) Vcc (30) GND (55) GOUT1 (80) COUT7
(6) Vcc (31) GND (56) GIN1 (81) GATE7
(7) GATE12 (32) GND (57) E_INT (82) ECLK7
(8) DI_6 (33) GND (58) DI7 (83) COUT6
(9) DI_4 (34) GND (59) DI5 (84) GATE6
(10) DI_2 (35) GND (60) DI3 (85) ECLK6
(11) DI_0 (36) GND (61) DI1 (86) COUT5
(12) DO_6 (37) GND (62) DO7 (87) GATE5
(13) DO_4 (38) GND (63) DO5 (88) ECLK5
(14) DO_2 (39) GND (64) DO3 (89) COUT4
(15) DO_0 (40) GND (65) DO1 (90) GATE4
(16) GATE11 (41) GND (66) ECLK12 (91) ECLK4
(17) GND (42) GND (67) COUT12 (92) COUT3
(18) GND (43) GND (68) ECLK11 (93) GATE3
(19) GND (44) GND (69) COUT11 (94) ECLK3
(20) GND (45) GND (70) GND (95) COUT2
(21) GND (46) GND (71) COUT10 (96) GATE2
(22) GND (47) GND (72) GATE10 (97) ECLK2
(23) GND (48) GND (73) ECLK10 (98) COUT1
(24) GND (49)GND (74) COUT9 (99) GATE1
(25) GND (50) GND (75) GATE9 (100) ECLK1
Figure 5: Pin Assignment of cPCI-8554/R Connector CN1
Legend:
ECLK n: External clock source for counter #n
ExtG n: External gate signal for counter #n
COUT n: Counter / Timer output of counter #n
DO_m: Digital output port channel #m
DI_ m:
Digital input port channel #m
E_int: External interrupt signal input
GOUT1: Inverse TTL signal of GIN1
GOUT2: Inverse TTL signal of GIN2
Note: pin-7and pin-16 is different from the definition in PCI-8554.