ADLINK PCI-8554 - Manual (Page 25)

Getting Started •15
2.8 Clock System
The clock system of the cPCI/PCI-8554/R provides the internal clock
source for the 8254 chips. The clock for counter/timer 1 ~ 10 can be one
of 4 sources; an external clock source, a cascaded source from the ‘last’
channel, CK1 or COUT10. The next section will outline details on setting
the clock for each counter/timer and CK1. The clock of counter/timer 11 is
fixed at 8Mhz, and the clock of counter/timer 12 is connected to COUT11
2.9 Counters Architecture
There are four 8254 programmable timer/counter chips on the cPCI/PCI-
8554/R card. Each 8254 chip contains 3 counter/timer and are labeled
from 1 to 12. Counters 11 and 12 are default cascaded counters, but can
be set for independent operation through jumpers JP12 & JP13. Counters
1 ~ 10 can also be set as an independent or cascaded counters. Table 3
illustrates the relationship between the reference 8254-chip label and the
counter labels.
8254 Chip
Label
Reference
Number
Counter
Label
Type of Counter
Counter 1 Independent or Cascaded
Counter 2 Independent or Cascaded Chip 1 U3
Counter 3 Independent or Cascaded
Counter 4 Independent or Cascaded
Counter 5 Independent or Cascaded Chip 2 U4
Counter 6 Independent or Cascaded
Counter 7 Independent or Cascaded
Counter 8 Independent or Cascaded Chip 3 U5
Counter 9 Independent or Cascaded
Counter 10 Independent or Cascaded
Counter 11 Independent or Cascaded Chip 4 U6
Counter 12 Independent or Cascaded
Table 3. Counters label relationship