ADLINK PCI-8554 - Manual (Page 31)

Getting Started •21
2.13 Debounce System
The debounce system is used to eliminate the affects of bounce
phenomenons. If an external clock is used, user can set JP1 ~ JP11 to
select, whether or not to used the debounce system. If the debounce
system is used, the debounce output signal will be in the same state as
the input only if the input signal maintains the same state for four DB_CLK
cycles, otherwise the input signal will be treated as a glitch and the
debounce output signal will maintain its present state, figure 15 illustrates
how to set these jumpers, figure 16 illustrates how to select the DB_CLK.
Figure 17 illustrates the basic timing of the debounce system. (Note:
DB_CLK can’t be higher than 2MHz).
ECK n
ECLK n
debounce
system
DB_CLK
JP n n=1~10
EXTINT
E INT
debounce
system
DB_CLK
JP11
Figure 15: Structure of JP1 ~ JP11
2MHz
DB_CLK
COUT11
select by function
"_8554_SET_DBCLK"
Figure 16: Clock Source of DB_CLK