ADLINK PCI-7396 - Manual (Page 27)

Registers Format
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3.4 Control Register
Each PPI’s control register is used to set its three ports to be as input or
output one independently.
Address: BASE + 04h
Attribute: write only
Data Format:
Bit 7 6 5 4 3 2 1 0
BASE+ 04h x x x x x P1C P1B P1A
BASE+ 05h x x x x x x x x
BASE+ 06h x x x x x x x x
BASE+ 07h x x x x x x x x
P1n : n: port number
Set to be ‘0’ for input port , ‘1’ for output port
3.5 External Trigger Enable Register
Users can write anything to this register to enable the external trigger to latch
the input data of port A,B and C simultaneously. Note that when this register
is enabled, the settings of the previous control register are disabled.
Address: BASE + 08h
Attribute: write only
Data Format:
Bit 7 6 5 4 3 2 1 0
BASE+08h x x x x x x x x
BASE+09h x x x x x x x x
BASE+0A
h x x x x x x x x
BASE+0B
h x x x x x x x x