ADLINK PCI-7396 - Manual (Page 26)

18
• Registers Format
The PCI-7396 has 2/4 PPIs on board. Each PPI contains 5 registers,
including Digital Data Register, Control Register, External Trigger Enable
Register, External Trigger Disable Register, and COS Interrupt Control
Register.
In the following sections, the 5 registers of PPI1 will be introduced
respectively. The registers of the other 3 PPIs are of the same configuration
which will not be repeated in this manual.
3.3 Digital Data Registers
The 24-bit I/O data of the PCI-7396 is accessed from/to this register by
software. The digital data can also be read back through this register.
Address: BASE + 00h
Attribute: read and write
Data Format:
Bit 7 6 5 4 3 2 1 0
BASE+
00h P1A
7 P1A
6 P1A
5 P1A
4 P1A
3 P1A
2 P1A
1 P1A
0
BASE+
01h P1B
7 P1B
6 P1B
5 P1B
4 P1B
3 P1B
2 P1B
1 P1B
0
BASE+
02h P1C
7 P1C
6 P1C
5 P1C
4 P1C
3 P1C
2 P1C
1 P1C
0
BASE+
03h X X X X X X X X
P1X7~P1X0: Digital I/O data X:A~C.