Features, Configuration, Spartan-6 – Digilent 410-256P-KIT User Manual
Page 2
FMC Carrier-S6 Reference Manual
www.digilentinc.com
page 2 of 7
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Features
Xilinx Spartan-6 LX45 FPGA, 324-pin BGA package
128Mbyte DDR2 with 16-bit wide data
on-board USB2 port for programming and data transfer
USB-UART
16Mbyte x4 SPI Flash for configuration and data storage
100MHz Oscillator
Over 120 GPIO signals available through FMC HPC
GPIO includes 2 LEDs, 2 buttons, and 2 slide switches
ships with 12V power supply and USB cable
Configuration
After power-on, the
FPGA on the FMC
Carrier
– S6 board must
be configured (or
programmed) before it
can perform any
functions. The FPGA
can be configured in two
ways: a USB-
connected PC can
configure the board
using the JTAG port any
time power is on and a
configuration file stored
in the SPI Flash ROM
can be automatically
transferred to the FPGA
at power-on.
An on-board mode jumper (JP2) selects between JTAG/USB and ROM programming modes. If JP2 is
loaded, the FPGA will automatically configure itself from the ROM. If JP2 is not loaded, the FPGA will
remain idle after power-on until configured from the JTAG port.
Both Digilent and Xilinx freely distribute software that can be used to program the FPGA and the SPI
ROM. Programming files are stored within the FPGA in SRAM-based memory cells. This data defines
the FPGA’s logic functions and circuit connections, and it remains valid until it is erased by removing
power or asserting the PROG_B input, or until it is overwritten by a new configuration file.
FPGA configuration files transferred via the JTAG port use the .bit or .svf file types.
Xilinx’s ISE
WebPack and EDK software can create .bit, .svf, .bin, or .mcs files from VHDL, Verilog, or schematic-
based source files (EDK is used for MicroBlaze™ embedded processor-based designs).
M0
M1
JTAG
Port
USB
Controller
Numonyx SPI
Flash (x4)
16Mbytes
SPI
Port
J2
Adept USB Port
Spartan-6
JP2
Done
Load to enable
boot from ROM
FT232HQ
J3
UART Port
Serial
Port
2
3V3