2 jumper setting & locations, 2 processor, 3 memory – Kontron AT8060 User Manual
Page 36: Jumper setting & locations, 2 processor 3.3 memory, Figure 3-1: jumper settings and locations, Figure 3-1:jumper settings and locations
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3.1.2
Jumper Setting & Locations
Figure 3-1:Jumper Settings and Locations
3.2
Processor
This product can be shipped with the CPUs and a thermal solution installed. The thermal solution is custom
and critical for passive cooling. Cooling performance can greatly be affected if heat sink is not handled
properly. Do not attempt any heat sink removal after installation.
3.3
Memory
The AT8060 has 4 memory channels connected to each CPU. There is one DIMM per memory channel for a total
of 4 per CPU. The AT8060 accepts DDR3, VLP(very low-profile) (0.72 inch; 18.29mm), 1.5V or 1.35V modules,
registered, ECC, x4 or x8 memory with up to 4 ranks per DIMM. The DDR3 memory channels run at 1333MHz or
1600MHz. The maximum DDR3 SDRAM size is 16GBytes per DIMM for a populated 128GBytes maximum.
Memory modules shall have a validated thermal solution (heatsink) and may necessitate a certain class of
chassis. It is recommended that modules have thermal sensors for accurate temperature monitoring and to
Note:
More details about the jumper settings can be found on the Quick Reference Sheet.
Watchdogs Disabled
Watchdogs Enabled
JP1 (1-2) Watchdogs
IN
OUT
Reserved
Normal
JP1 (3-4) Reserved
IN
OUT
Override (FPGA turn-on table)
Normal
JP1 (5-6) IPMI Override
IN
OUT
Override (turn-on FRUs)
Normal
JP1 (7-8) FRU Override
IN
OUT
Default Configuration
Override (drive FRUs clocks)
Normal
JP1 (9-10) FRU PCIe Override
IN
OUT
Factory Mode
Operation
JP1 (11-12) Factory Mode
IN
OUT
Reserved
Normal Normal Operation
JP1 (13-14) Reserved
IN
OUT
J1 J2
J3 J4 J5 J6
J7 J8
JP2
JP1
1
13
2
14
1
13
2
14
J30
J31
Reserved
Normal Operation
JP2 (1-2) Spare
IN
OUT
Factory Prom (Fail-Safe)
Normal (Auto)
JP2 (3-4) FPGA PROM Selection
IN
OUT
Reserved
Normal Operation
JP2 (5-6) Clear BIOS Setup In Flash
IN
OUT
Reserved
Normal Operation
JP2 (7-8) FPGA Reserved #0
IN
OUT
Reserved
Normal Operation
JP2 (9-10) FPGA Reserved #1
IN
OUT
Reserved
Normal Operation
JP2 (11-12) Reserved
IN
OUT
Reserved
Normal Operation
JP2 (13-14) IPMC Reserved
IN
OUT
Default Configuration