4 process-side signal conditioning, 5 cable interfacing, Process-side signal conditioning - 4 – Kontron CP371 User Manual
Page 60: Cable interfacing - 4, System considerations cp371
System Considerations
CP371
Page 5 - 4
© 2002 PEP Modular Computers GmbH
ID 23762, Rev. 02
5.4
Process-side Signal Conditioning
Considerations:
1. Input signals presented to the CP371 must be within the ranges specified for the signal
type or erroneous results will occur as well as possible damage to the CP371.
2. Ensure that when analog ground pins on CON2 are used that on the process side no
grounding loops are created. Refer to chapter 4 for further information.
5.5
Cable Interfacing
Considerations:
1. No modification to the CP371 itself is permitted (i.e. connector pin shorting).
2. If necessary, cabling to the CP371 CON2 connector should physically fixed to prevent
strain on the CON2 connector.
See also other documents in the category Kontron Hardware:
- CP3003-SA uEFI BIOS (72 pages)
- CP3003-SA (36 pages)
- CP3002 (38 pages)
- CP3002-RC uEFI (64 pages)
- CP-RIO3-05 (42 pages)
- CP3002-RC (30 pages)
- CP342 (52 pages)
- CP930 (46 pages)
- CP932 (52 pages)
- CP346 (72 pages)
- CP384 (66 pages)
- CP383 (74 pages)
- CP382 (58 pages)
- CP381 (60 pages)
- CP372 (64 pages)
- CP-RIO3-04S (38 pages)
- CP390 (36 pages)
- CPS3410 (9 pages)
- CPS3402 (9 pages)
- CPS3105 (9 pages)
- CPS3101 (9 pages)
- CPS3003-SA (19 pages)
- PB-SIO4 (34 pages)
- PB-SIO4A (34 pages)
- PB-DOUT8 (34 pages)
- VMOD-2 (82 pages)
- VSBC-32 (110 pages)
- VM42 (62 pages)
- Bootstrap Loader (24 pages)
- VMP1 with Netbootloader (120 pages)
- VMP1 (106 pages)
- NetBootLoader (86 pages)
- VMP2 (142 pages)
- VMP3 (154 pages)
- CP-RIO6-923 (32 pages)
- CP-RIO6-923-F (32 pages)
- CP-RIO6-001 (28 pages)
- CP-RIO6-001-HD-VGA (46 pages)
- CP-RIO6-M (20 pages)
- CP-RIO6-B (28 pages)
- CP6925 (42 pages)
- CP6002 uEFI BIOS (76 pages)
- CP6002 IPMI (40 pages)
- CP6002 (42 pages)