Cypress CY14B101P - Manual (Page 26)

PRELIMINARY CY14B101P
Document #: 001-44109 Rev. *B Page 26 of 32
AutoStore or Power Up RECALL
Parameters Description
CY14B101P
Unit
Min Max
t
FA
[8] Power Up RECALL Duration 20 ms
t
STORE
[9] STORE Cycle Duration 8 ms
t
DELAY
[10] Time Allowed to Complete SRAM Cycle 25 ns
V
SWITCH
Low Voltage Trigger Level 2.65 V
t
VCCRISE
VCC Rise Time 150 µs
V
HDIS
[6] HSB Output Driver Disable Voltage 1.9 V
t
LZHSB
HSB To Output Active Time 5 µs
t
HHHD
HSB High Active Time 500 ns
Notes
8. t
FA
starts from the time V
CC
rises above V
SWITCH.
9. If an SRAM write has not taken place since the last nonvolatile cycle, no AutoStore or Hardware Store takes place.
10. On a Hardware Store, Software Store / Recall, AutoStore Enable / Disable and AutoStore initiation, SRAM operation continues to be enabled for time t
DELAY
.Read and
Write cycles are ignored during STORE, RECALL, and while VCC is below V
SWITCH.
11. HSB pin is driven HIGH to VCC only by internal 100kOhm resistor, HSB driver is disabled.
Switching Waveforms
Figure 27. AutoStore or Power Up RECALL
[10]
tSTORE tSTORE
tHHHD tHHHD
tDELAY
tDELAY
VVCCRISE
Note9 Note9
Note11
tLZHSB tLZHSB
tFA
tFA
VSWITCH
VHDIS
HSB OUT
Autostore
POWER-UP
RECALL
Read and Write
Inhibited (RWI)
POWER-UP
RECALL
POWER-UP
RECALL
Read and Write Read and Write BROWN
OUT
AUTOSTORE
POWER
DOWN
AUTOSTORE
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